Introduction to VLSI CAD
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VLSI Design CAD Tutorials

Tutorials based on Windows
Analog Circuit Simulation using OrCAD PSPICE
This tutorial describes one simple example of analog circuit
simulation using OrCAD SPICE (cadence).
FPGA Design on PCs using Verilog HDL
This tutorial describes one example of the FPGA design
using Verilog HDL on PCs. Verilog HDL simulator ModelSim
(Model Technology), Logic Synthesis FPGA Express (SYNOPSYS),
MAX+Plus II (Altera) are used in this tutorial.
Testbench Generator for HDL Simulation
This tutorial describes one example of the Testbench design
using Verilog HDL on PCs. Verilog HDL simulator ModelSim
(Visual Software Solutions).
Verilog HDL Simulator on PCs
This tutorial describes one example how to use Verilog HDL
simulator Verilogger Pro (Evaluation), which works on PCs.
Tutorials based on UNIX
Standard Cell LSI Design using Verilog HDL
This tutorial describes one example to design the standard cell
LSI using Verilog HDL. The Verilog HDL simulator is Verilog-XL
on Design Framework II ver. 9504 (Cadence), Logic synthesis
tool is Design Compiler ver. 1997.01 (SYNOPSYS), and the
standard cell LSI design tool is CellEmsamble (Cadence).
FPGA Design using Verilog HDL
This tutorial describes one example to design the standard cell
LSI using Verilog HDL. The Verilog HDL simulator is Verilog-XL
on Design Framework II ver. 9504 (Cadence), Logic synthesis
tool is Design Compiler ver. 1997.01 (SYNOPSYS), and the
standard cell LSI design tool is CellEmsamble (Cadence).
MAX-Plus II is also used.
Analog HDL Simulation using Analog Artist
This tutorial describe to simulate the Spectre HDL which is one
of effective analog HDLs, using Analog Artist on Design
Framework II ver. 9504 (Cadence).
Analog Circuit Simulation using Analog Artist
This tutorial describe to simulate analog circuits using Analog
Artist on Design Framework II ver.9504 (Cadence).
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